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OpenAI's First Chip Has a Name, a Photo, and No Benchmarks

Jalapeño is real silicon, built with Broadcom and taped out in nine months. The performance claim is a slide with no numbers behind it.

Janet Torvalds

June 25, 2026

OpenAI unveiled its first custom chip on Wednesday, a processor built with Broadcom and named Jalapeño. It is designed for one job: running large language models after they have already been trained, the part of the workload the industry calls inference. OpenAI is calling it an "Intelligence Processor," which is marketing. Underneath the name it is a custom inference ASIC, the same category of chip that Google (TPU), Amazon (Trainium), Meta (MTIA), and Microsoft (Maia) have all built to stop renting every accelerator they need from Nvidia.

That is the real story here. OpenAI spends enormous sums running models like GPT-5 for ChatGPT, Codex, and its API, and almost all of that compute currently runs on Nvidia GPUs. A chip OpenAI designs itself, tuned to its own serving patterns, is a way to take some of that bill back in-house. The partnership with Broadcom was announced in October, and OpenAI's chip ambitions have been rumored for over a year.

The numbers that would matter are missing

OpenAI says early testing shows Jalapeño delivers "performance per watt substantially better than current state-of-the-art." That is the entire performance claim. There is no benchmark, no throughput figure, no latency number, no power envelope, and no named comparison chip. OpenAI says a technical report is coming "in the coming months."

"Better than state-of-the-art" is not a measurement until you say better than what, by how much, on which workload. Nvidia's Blackwell? AMD's MI350? Measured at what batch size, on what model, at what context length? A perf-per-watt number with none of that attached is a slide, not a result. Tom's Hardware, which covered the same announcement, reached the same conclusion and noted the companies "did not disclose performance targets," so the claims "should be taken with a grain of salt."

To be clear about what is not in dispute: OpenAI does appear to have working silicon. The company says engineering samples are running in the lab at target clock and power, executing real machine learning workloads including a model it calls GPT-5.3-Codex-Spark. Running production-target samples is a genuine engineering milestone. It is just not the same thing as a chip you can benchmark, and the announcement quietly conflates the two.

What the photo actually shows

Because OpenAI released images of the wafer and the packaged part but no specifications, the most concrete technical read comes from outside analysis. Tom's Hardware measured the package from the published photos and estimates one large compute chiplet of roughly 840 square millimeters, sitting very close to the 858 square millimeter reticle limit of EUV lithography. That is a big die, closer in size to a training chip than to the small inference parts most companies ship. Around it, the analysis counts six HBM memory stacks plus a separate I/O chiplet and two structural dummy dies.

The use of HBM rather than cheaper DRAM is the one design choice that tells you something. High-bandwidth memory is expensive, and putting it on an inference part signals that OpenAI is optimizing for low latency on memory-hungry reasoning and agentic workloads, where the model has to make many sequential passes. That is consistent with what OpenAI runs. It is also a choice that costs money, which undercuts any simple "cheaper inference" framing until the actual economics show up. None of the die-size or memory details are confirmed by OpenAI. They are a careful estimate from a photograph, and worth exactly that much.

OpenAI's hardware lead, Richard Ho, framed the design around software: "We optimized the architecture around the kernels, memory movement, networking, and serving patterns that matter most for frontier AI models." Greg Brockman put the same idea more plainly on OpenAI's podcast when the Broadcom deal was announced: "We have a deep understanding of the workload."

Nine months is the most surprising claim

The detail most worth paying attention to is not the performance hand-wave, it is the schedule. OpenAI says Jalapeño went from initial design to manufacturing tape-out in nine months, and calls it the fastest ASIC development cycle ever for a high-performance chip. A custom ASIC of this complexity normally takes 18 to 24 months. The company says OpenAI's own models helped accelerate parts of the design and optimization.

Treat the "AI designed the chip" line with some care. Broadcom has its own well-known shortcut: it reuses large blocks of proven logic across the custom chips it builds for different customers, which is a big part of why its ASIC business moves fast. Some of that nine months is almost certainly Broadcom's library, not a language model inventing a floorplan. The honest version is that AI tooling plus heavy IP reuse plus a motivated customer compressed a schedule that is usually measured in years. That is still notable. It is also not the same as a model designing silicon on its own.

When it ships, and who runs it

Jalapeño is slated for deployment starting late 2026, at what Broadcom CEO Hock Tan described as gigawatt scale with Microsoft and other partners. "This is just the beginning of a multi-generation roadmap," Tan said. Celestica is handling board, rack, and system integration, and Broadcom is supplying its Tomahawk networking silicon. OpenAI also says the chip is built to run other companies' LLMs, not only its own, which leaves the door open to selling or renting it later, assuming Broadcom and TSMC can produce enough of them.

The competitive question the announcement does not answer: even granting OpenAI's claims, beating today's hardware is a moving target. By the time Jalapeño is deployed at scale, the chips to beat will be Nvidia's Rubin generation and AMD's MI400 series, not the parts shipping now. A chip that looks good against 2025 silicon in a lab in 2026 has to still look good against 2027 silicon in production.

So here is where it lands. OpenAI building its own inference chip is a rational move with real engineering behind it, and the nine-month turnaround is the part that should make competitors pay attention. The performance claim is a placeholder until the technical report shows up with numbers and a methodology. Until then, Jalapeño is a milestone marker and a photo of two CEOs holding a wafer. Judge the chip when it has a benchmark.

BroadcomSemiconductorsinference chipRichard HoJalapeñoGoogle TPUAI InferenceCustom SiliconOpenAIAI HardwareHock Tancustom ASICNvidiaHBMGPT-5AI accelerator

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